makefile - Match anything pattern rule with dependency -


file name: makefile.mk

%: foo     @echo %: $@ foo  foo:     @echo foo

run

$ make -f makefile.mk test

output:

foo %: makefile.mk foo %: test foo

i running in gnu make 3.81 version. don't understand, why file name printed(%: makefile.mk foo). can 1 please explain me?

this because of how makefiles remade. that

sometimes makefiles can remade other files

and

if makefile can remade other files, want make up-to-date version of makefile read in

so

after reading in makefiles, make consider each goal target , attempt update it.

which matches against match-anything rule , triggers way see.

if add explicit makefile.mk: ; target makefile override match-anything target , prevent this.


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